EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) Copyright (R) National Semiconductor Corporation 1990,1991 Document file for ..\v2.eqn Device: 20V8 $LABELS 24 ck clkd a1 a2 a3 a7 a6 a5 a4 iorq m1 gnd /oe wr rt re wt we bife mff clk selp rd vcc Pin Label Type --- ----- ---- 1 ck clock pin 2 clkd com input 3 a1 com input 4 a2 com input 5 a3 com input 6 a7 com input 7 a6 com input 8 a5 com input 9 a4 com input 10 iorq com input 11 m1 com input 12 gnd ground pin 13 oe enable pin 14 wr com input 15 rt pos,trst,com output 16 re neg,trst,com output 17 wt pos,trst,com output 18 we neg,trst,com output 19 bife neg,trst,com output 20 mff pos,reg feedback 21 clk pos,trst,com output 22 selp neg,trst,com output 23 rd com input 24 vcc power pin EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) Copyright (R) National Semiconductor Corporation 1990,1991 Device Utilization: No of dedicated inputs used : 12/12 (100.0%) No of feedbacks used as dedicated outputs : 7/8 (87.5%) No of feedbacks used : 1/8 (12.5%) ------------------------------------------ Pin Label Terms Usage ------------------------------------------ 22 selp 7/8 (87.5%) 21 clk 3/8 (37.5%) 20 mff 1/8 (12.5%) 19 bife 6/8 (75.0%) 18 we 3/8 (37.5%) 17 wt 3/8 (37.5%) 16 re 3/8 (37.5%) 15 rt 3/8 (37.5%) ------------------------------------------ Total 22/64 (34.4%) ------------------------------------------ EQN2JED - Boolean Equations to JEDEC file assembler (Version V003) Copyright (R) National Semiconductor Corporation 1990,1991 Chip diagram (DIP) ._____ _____. | \__/ | ck | 1 24 | vcc clkd | 2 23 | rd a1 | 3 22 | selp a2 | 4 21 | clk a3 | 5 20 | mff a7 | 6 19 | bife a6 | 7 18 | we a5 | 8 17 | wt a4 | 9 16 | re iorq | 10 15 | rt m1 | 11 14 | wr gnd | 12 13 | /oe |______________|